Intel's 1986 ICCD paper Performance Optimizations of the 80386 reveals how tightly this was optimized. The entire address translation pipeline -- effective address calculation, segment relocation, and TLB lookup -- completes in 1.5 clock cycles:
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（二）对正常运行的无线电台（站）产生有害干扰，经有关主管部门指出后，拒不采取有效措施消除的；